![]() The solution also delivers power reduction of more than 25% compared to 7nm, enabling systems with tight thermal/power constraints and helping to drive down the total cost of ownership. Marvell’s 112G 5nm SerDes offers breakthrough performance with the ability to operate at 112G PAM4 across channels with >40dB insertion loss, providing a margin that is critical for high-reliability infrastructure applications. The 112G 5nm SerDes solution is part of Marvell’s industry-leading IP portfolio that addresses the full spectrum of infrastructure requirements and includes processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of physical layer interfaces. ![]() The Marvell 5nm SerDes solution doubles the bandwidth of current systems based on 56G while enabling the deployment of 112G I/Os in many exciting new applications, including network and data center switching, network traffic management, machine learning training and inference, and application-specific accelerators. Marvell has recently secured a new custom ASIC design win customer that will embed this new IP to build next-generation top-of-rack (ToR) and spine switches for leading hyperscale data centers around the world. The DSP-based SerDes boasts industry-leading performance, power, and area, helping to propel 112G as the interconnect of choice for next-generation 5G, enterprise, and cloud data center infrastructure. Marvell unveiled the industry’s first 112G 5nm SerDes solution that has been validated in hardware.
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